1. Field of the Invention
The invention relates to a manufacturing method for a metal gate, and more particularly, to a manufacturing method for a metal gate integrated with the gate last process.
2. Description of the Prior Art
With a trend towards scaling down size of the semiconductor device, conventional methods, which are used to achieve optimization, such as reducing thickness of the gate dielectric layer, for example the thickness of silicon dioxide layer, have faced problems such as leakage current due to tunneling effect. In order to keep progression to next generation, high dielectric constant (hereinafter abbreviated as high-k) materials are used to replace the conventional silicon oxide to be the gate dielectric layer because it decreases physical limit thickness effectively, reduces leakage current, and obtains equivalent capacitor in an identical equivalent oxide thickness (EOT).
On the other hand, the conventional polysilicon gate also has faced problems such as inferior performance due to boron penetration and unavoidable depletion effect which increases equivalent thickness of the gate dielectric layer, reduces gate capacitance, and worsens a driving force of the devices. Thus work function metals are developed to replace the conventional polysilicon gate to be the control electrode that competent to the high-K gate dielectric layer.
However, there is always a continuing need in the semiconductor processing art to develop semiconductor device renders superior performance and reliability such as ensure the metal gate of the n-type metal-oxide-semiconductor (nMOS) having a work function of about 4.1 eV and the metal gate of the p-type MOS (pMOS) having a work function of about 5.1 eV even though the conventional silicon dioxide or silicon oxynitride gate dielectric layer is replaced by the high-K gate dielectric layer and the conventional polysilicon gate is replaced by the metal gate.